Semiconductor chips are typically connected to a printed circuit board that in turn interconnects the chip into the rest of circuitry with which the chip will operate including other chips on the printed circuit board. In the past the chips were spread out across the printed circuit board on their large flat sides in a simple two-dimensional array. Over the years the trend in the computer industry has been towards more densely packed printed circuit boards. Among the causes for this are the increasing demand for larger random access computer memories, demand for faster computers, demand for more compact computers and a push to decrease costs of printed circuit boards by increasing the circuit density on the printed circuit board. In the mid to late 1980's the industry switched over from a technology that attached computer chips to a printed circuit board through holes in the printed circuit board to one that used a surface mounting technology. With the advent of surface mount technology, conventional through-holes on printed circuit boards have been replaced with conductive mounting pads on the surface of the printed circuit board. This allows for multiple layered circuit boards with a complex network of interconnect lines running between the layers of the board. In turn this has allowed for the increase in the density of chips on a printed circuit board which not only decreases the size of the board but increases the operating speed of the computer by reducing the distance signals have to travel between chips on the board.
The move to surface mount technology has consequently resulted in the practice of positioning the chips on the printed circuit board in a variety of configurations to increase chip density on the circuit board and thereby decrease the distance between the chips to speed up operation of the to overall system. Generally, conventional configurations stack the chips on one another to increase density. The practice of stacking the chips on one another is particularly adaptable to memory chips given the redundancies in their circuits. Up until the present, in order for the chips to be stacked on one another to increase chip density and achieve a three-dimensional array on the circuit board, computer makers had to send the chips to a third party manufacturer that specialized in the technique of permanently bonding chips in a stacked fashion. Stacking the chips generally consisted of soldering them together. This in turn created a variety of problems including time delays inherent in having to rely on an outside manufacturing facility and potential damage to the chip as a result of directly soldering the chips together.
Recent developments, in particular those of the applicant of the present invention have resulted in new and much more efficient means for stacking chips on a printed circuit board in a three dimensional array. These developments are described in detail in copending patent applications owned by the applicant herein, they being: United States patent application for a “Circuit Board Assembly Having A Three Dimensional Array of Integrated Circuit Packages” Ser. No. 09/285,354 filed Apr. 4, 1999, and United States patent application for a “Electronic Module Having a Three Dimensional Array of Carrier-Mounted Integrated Circuit Packages” Ser. No. 09/524,324 filed Mar. 3, 2000. Both of these applications are incorporated herein by reference and made part hereof as if set forth herein at length. The two referenced applications describe a unique electronic module that in effect provides a platform that is placed over a chip on a circuit board and connects to contact pads on the circuit board that the platform shares with the chip underneath it. The second chip is then connected to the top of the platform to achieve a stacked three-dimensional array as more fully described in the above referenced patent applications. 21A and 21B of FIG. 1 depict two different variations of the chip carriers described and claimed in the two above referenced applications. 21A depicts a chip carrier made in the form of a printed circuit board and 21B depicts a chip carrier made in a molded packaging.
However, in order to maximize the advantages of the electronic chip carrying modules described in the two above mentioned copending applications what is needed is a manufacturing process and apparatus which will automate and optimize their installation. Additionally, it should be a manufacturing process and apparatus that can be used in house by a computer or circuit board manufacturer without the need to use the services of a third party manufacturer.